Title: Dynamic Comparator Noise and Metastability Simulation Techniques
William Evans, Cadence, USA
Dynamic or latching comparators are key building blocks used in the design of high speed SAR (Successive Approximation) ADC converters and SerDes (Serializer-Deserializer) receivers. New techniques will be presented on ways to simulate noise in dynamic comparators along with a discussion on simulation pit falls. The topic of comparator metastability will also be covered including simulation techniques and how the simulation results can be related to probability of conversion errors.