Title: Cognitive Computer Architecture for Machine Learning, Data Center Processing and In


Andreas G. Andreou, Johns Hopkins University, USA


Internet, digital telephony, email, and other electronic media are making human communication, activity, and experience to be mediated by computers. However, computing in data centers, the engines behind our insatiable desire for global communication, instant connectedness and interaction comes at an economic and environmental cost. Future projected needs in data centers are data intensive applications in Cognitive Computing Technology (CCT). CCT aims at advancing intelligent software and hardware that can process, analyze, and distill knowledge from vast quantities of text, speech, images and biological data ultimately with and as much nuance and depth of understanding as a human would. To meet the scientific demand for future data-intensive CCT for every day mundane tasks such as searching via images to the uttermost serious health care disease diagnosis in personalized medicine, we urgently need a new cloud computing paradigm and energy efficient i.e. green technologies. On the other hand, as the scaling of technology approaches fundamental physical barriers, new breakthroughs in materials, integration technologies and architectures will be needed to sustain the information technology revolution, while keeping computation cost energy efficient.

The overall objective of this tutorial is to provide the foundation and design principles for Cognitive Processor Unit (CogPU) System on Chips (SOC). We begin the tutorial by an overview of the application domain (for example Google machine translation), a review of state of the art approaches and experimental systems with detail discussion of one particular system, the IBM TrueNorth neurosynaptic architecture. We then focus on a particular architecture, nanoABACUS, that combines Ultra-Low-Voltage (ULV) 400mV voltage supply circuit techniques, brain-inspired chip-multiprocessor network-on-chip (NoC) architectures, probabilistic event-based information encoding, Bayesian Inference, non-volatile memory learning and memorization devices, and energy efficient bio-inspired information exchange through 2.5D interposer, application specific and commercial ''chiplets'' and 3D CMOS structures.